Enhanced OS & SSD Cross Layer I/O Optimization (Greybox SSDs) (2015 - 2017)

Overview

Research on advanced cross-layer optimization techniques by introducing new SSD functionalities and extending the interface between the OS and the SSD. Employed multiple SSD evaluation platforms for research. Developed SSD FTL code enhancements as well as corresponding block device driver codes for the OpenSSD Cosmos SSD evaluation platform. Also built a DRAM backed FPGA based SSD latency emulation platform with the Xilinx VC709 evaluation board. Developed Linux block device driver code (v3.5.0), FTL enhancements running on SSD microprocessors (ARM Cortex A9, Xilinx Microblaze) as well as the FPGA logic (Xilinx Zynq-7000 & Xilinx Virtex7) for latency emulation, interrupt control and PCI-e communication. OpenSSD platform results presented in USENIX HotStorage’16.

Technology

• Linux Kernel 3.5.0
• OpenSSD Cosmos evaluation board (Xilinx Zynq-7000, ARM Cortex A9, Xilinx Microblaze)
• SK Hynix NAND Flash Engineering Samples
• Xilinx VC709 evaluation board for PCI-e based DRAM SSD (Xilinx Virtex 7)
• Verilog
• Xilinx Vivado High-level Synthesis
• System C

Publications

• Shin et al., “Unblinding the OS to Optimize User-Perceived Flash SSD Latency”, USENIX HotStorage'16